Part A
ADF4156BCPZ
Analog Equipment GmbH.
- Lifecycle
- Active
- Stock
- 1350 PCS
- Package
- WFQFN-20
- Series
- Horloge Timing - générateur d'horloge, PLL, synthétiseur de fréquence
Replacement verdict
Compatible functional replacement candidate
The ADF4156BCPZ and ADF4106BCP are both fractional-N PLL frequency synthesizers in a 20-lead LFCSP package with a 3-wire SPI-compatible interface and overlapping supply ranges, making them a viable functional replacement candidate. However, the ADF4156BCPZ offers a higher maximum RF input frequency and a wider operating temperature range, while the ADF4106BCP provides a higher maximum PFD frequency. Designers should validate loop filter design, charge pump current settings, and register map compatibility before substituting one for the other in an existing design.
Package Type
High match
Supply Voltage Range
High match
Maximum RF Input Frequency
Validation required
Operating Temperature Range
Validation required
Parts at a glance
Part B
ADF4106BCP
Analog Equipment GmbH.
- Lifecycle
- Active
- Stock
- 4491 PCS
- Package
- WFQFN-20
- Series
- Horloge Timing - générateur d'horloge, PLL, synthétiseur de fréquence
Key differences
Rows are prioritized by design impact. Highlighted values require attention during substitution.
Key electrical and mechanical differences between the two devices
| Parameter | ADF4156BCPZ | ADF4106BCP | Why it matters |
|---|---|---|---|
| Maximum RF Input Frequency | 6 GHz | 6 GHz | Both devices support the same upper frequency limit, so they cover the same high-frequency PLL applications. |
| Maximum PFD Frequency | 32 MHz | 55 MHz | A higher phase frequency detector rate allows wider loop bandwidth and faster settling, so the ADF4106 can achieve quicker lock times. |
| Normalized Phase Noise Floor | -216 dBc/Hz | -219 dBc/Hz | Lower phase noise floor yields cleaner synthesized signals; the ADF4106 offers about 3 dB better noise performance. |
| RF Input Sensitivity Range | -10 dBm to +5 dBm (typical) | -10 dBm to +5 dBm (typical) | Identical input sensitivity means both accept the same drive levels from the VCO, simplifying RF front-end design. |
| Supply Voltage | 2.7 V to 3.3 V | 2.7 V to 3.3 V | Matching supply ranges allow either part to be used in the same 3 V rail design without regulator changes. |
| Package | 20-Lead LFCSP (4 mm x 4 mm) | 20-Lead LFCSP (4 mm x 4 mm) | Same package and footprint enable drop-in board compatibility between the two devices. |
| Fractional-N Capability | Yes (fractional-N) | No (integer-N only) | Fractional-N support allows finer frequency resolution and lower spurs, so the ADF4156 is preferred where fine step sizes are required. |
| Charge Pump Current | Up to 5 mA (programmable) | Up to 5 mA (programmable) | Equivalent programmable charge pump current gives similar loop filter design flexibility for both parts. |
| Operating Temperature Range | -40 °C to +85 °C | -40 °C to +85 °C | Identical temperature ratings ensure both parts suit the same industrial-grade environments. |
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Full specification comparison
Use manufacturer datasheets as the final authority.
| Specification | ADF4156BCPZ | ADF4106BCP |
|---|---|---|
| Supplier | - | Rochester Electronics, LLC |
| Part Status | Active | Obsolete |
| Type | Fractional N Synthesizer (RF) | Clock/Frequency Synthesizer (RF) |
| PLL | Yes | Yes |
| Input | CMOS, TTL | CMOS |
| Output | Clock | Clock |
| Ratio - Input: Output | 2:1 | 2:1 |
| Differential - Input: Output | Yes/No | Yes/No |
| Frequency - Max | 6.2GHz | 6GHz |
| Divider / Multiplier | Yes/Yes | No/No |
| Voltage - Supply | 2.7V ~ 3.3V | 2.7V ~ 3.3V |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Circuits | 1 | - |
| Operating Temperature | -40°C ~ 85°C | - |
Frequently asked questions
What are the key differences between the ADF4156BCPZ and ADF4106BCP?
The ADF4156BCPZ is a fractional-N PLL frequency synthesizer with an integrated VCO, operating up to 6 GHz, while the ADF4106BCP is an integer-N PLL frequency synthesizer without an integrated VCO, operating up to 6 GHz. The ADF4156BCPZ supports fractional-N operation for finer frequency resolution, whereas the ADF4106BCP requires an external VCO and uses integer-N architecture.
Are the ADF4156BCPZ and ADF4106BCP pin-compatible?
No. The ADF4156BCPZ is supplied in a 20-lead LFCSP package, while the ADF4106BCP is supplied in a 20-lead TSSOP package. The package types and pin assignments differ, so they are not pin-compatible and cannot be dropped into the same PCB footprint without redesign.
What is the maximum operating frequency of each device?
Both the ADF4156BCPZ and ADF4106BCP have a maximum RF input frequency of 6 GHz, as specified in their respective Analog Devices datasheets. The ADF4156BCPZ integrates a VCO covering a defined range, while the ADF4106BCP requires an external VCO to achieve its operating frequency.
Do both devices require an external loop filter?
Yes. Both the ADF4156BCPZ and ADF4106BCP are PLL synthesizers that require an external loop filter to set loop bandwidth and stability. The ADF4156BCPZ additionally integrates a VCO, but the loop filter remains external for both parts.
Which device supports fractional-N synthesis?
Only the ADF4156BCPZ supports fractional-N synthesis, allowing finer frequency step resolution than integer-N architectures. The ADF4106BCP is an integer-N PLL synthesizer and provides frequency resolution determined by the reference frequency divided by the R counter.
What are the supply voltage requirements for these parts?
Both the ADF4156BCPZ and ADF4106BCP operate from a nominal 3.0 V to 3.6 V supply, consistent with Analog Devices datasheet specifications. Designers should verify the exact supply range and current consumption from the respective datasheets for their operating conditions.
Can the ADF4106BCP be used as a direct replacement for the ADF4156BCPZ?
No. The ADF4106BCP is an integer-N PLL without an integrated VCO, while the ADF4156BCPZ is a fractional-N PLL with an integrated VCO. They differ in architecture, package, and external component requirements, so a direct replacement is not possible without circuit redesign and validation.